The Future of Hardware Technologies for Computing
Talkat Algorithmic Foundations for Emerging Computing Technologies Boot Camp 2025 · 2025-09-08..09-12·
summary
Claims a practical path to ultra-dense 3D chips: monolithic 3D with CNT+RRAM fabricated in foundries (SkyWater/TSMC) and prototypes show iso-footprint CMOS-like behavior and a measured ~10× throughput or energy-delay gains for specific AI mappings, while theory predicts 100–1,000× EDP if vertical link density reaches ~100M/mm² (vs ~3k/mm² for TSV/HBM). Two edge chips, CHIMERA and MINOTAUR, demonstrate inference plus fine-tuning with a 100× write reduction via low-rank training yielding ~340× EDP vs SGD, and a new verifier, G-QED finds all bugs up to bound, scales to 250M gates and cuts verification from months to weeks.
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chapters (12)
- 0:00The history of computing
- 3:00Memory and processing walls
- 6:39Introduction to N3XT 3D
- 11:06The 3D mosaic concept
- 17:32Monolithic 3D integration
- 24:07Lab to fab implementation
- 30:22Systems and edge AI
- 39:05Algorithmic co-design
- 44:28Illusion systems and scaling
- 53:54Thermal and cost challenges
- 1:00:41Advanced design verification
- 1:05:20Q&A and concluding remarks
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