Memory-Centric Computing: Enabling Fundamentally Efficient & Intelligent Machines
Talkat Algorithmic Foundations for Emerging Computing Technologies Boot Camp 2025 · 2025-09-08..09-12
summary
Talk argues memory must act as an active accelerator and shows concrete hardware and software work: FPGA-based PiDRAM and Ramulator testbeds, experiments revealing Rowhammer and the newer RowPress read‑disturb effect, evidence that JEDEC added activation counters in 2024, and age‑dependent, unpredictable variable read disturbance. Prototypes demonstrate RowClone page copy (measured >10× latency and ~70% DRAM energy reduction), multi‑row activation enabling bitwise AND/OR/NAND/NOR and up to 31‑row copies, and on‑chip TRNGs; many results are open source.
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chapters (12)
- 0:00The data-centric challenge
- 3:05Data movement inefficiencies
- 6:31The costs of processor-centricity
- 11:05Real-world energy impacts
- 12:21A paradigm shift to data-centric
- 18:07DRAM scaling and RowHammer
- 25:25Intelligent memory controllers
- 34:03Processing near memory concepts
- 38:43Applications of PIM
- 49:48Processing using DRAM
- 1:03:21In-DRAM computational experiments
- 1:11:22Adoption and future outlook