Hardware Constraints

on YouTube ↗01h 18m

" summary

Argues that Moore-style cost scaling has stopped around 45 nm so cost per transistor stalls post-45nm, and that the practical response is massive specialization plus advanced packaging (chiplets, microbumps, TSVs, copper face‑to‑face bonding). Shows numbers: HBM 5–8 TB/s to GPUs, modules dissipating ~1–2 kW, racks ~120 kW–0.5 MW, and energy ∝ C·V² with wires (over 50% of capacitance) dominating. Concludes locality, parallelism and operation specialization — not new devices — decide whether accelerators or PIM actually save performance or money.

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" chapters (15)

1. 0:00Introduction
2. 1:09Hardware constraints overview
3. 5:00Emerging hardware tech
4. 12:19End of Moore's Law
5. 20:41Chiplet challenges
6. 27:19High-bandwidth memory
7. 31:41Evaluating new tech
8. 39:42CMOS limitations
9. 45:50Memory hierarchy
10. 57:57Summary and questions
11. 1:00:09Matrix multiplication
12. 1:05:08SIMD parallelism
13. 1:09:51Hardware efficiency future
14. 1:14:49Supply demand imbalance
15. 1:16:20Q&A