Algorithmic Foundations for Emerging Computing Technologies Boot Camp 2025
2025-09-08..2025-09-12
Berkeley, United States
who it's for
hardware architects, computer architects, accelerator designers, memory system designers, ml hardware engineers, systems researchers, eda engineers, embedded systems engineers
topics
monolithic 3D with CNT RRAM; chiplet and advanced packaging; in-memory processing (PIM); memristive MPU with MAGIC NOR; fpga microarchitecture and OpenFPGA; hls-based AI accelerator generator; automated accelerator design space exploration; memory-centric computing and RowClone; rowhammer and RowPress read-disturb; mosaic pages and iceberg hashing (TLB); DVS event camera with spiking/analog nets; scalable formal hardware verification (G-QED)
| title | author | length |
|---|---|---|
| Computer Architecture 101 and its Future | David Patterson | 01h 12m |
Covers why Dennard scaling ends and Moore’s cadence slows, how servers now pack ~64–128 cores (two‑way SMT → ~256 threads) at 3–4.5 GHz with hundreds of… | ||
| The Future of Hardware Technologies for Computing | Subhasish Mitra | 01h 21m |
Claims a practical path to ultra-dense 3D chips: monolithic 3D with CNT+RRAM fabricated in foundries (SkyWater/TSMC) and prototypes show iso-footprint… | ||
| Rethinking Computing with Neuro-Inspired Learning: Algorithms to Hardware | Kaushik Roy | 01h 16m |
Argues that brains beat AI on energy: fruit fly uses microwatts while a prototype “flying monkey” needs 1–2 W, and global chatbot ops cost about 3.65–36.5 TWh… | ||
| Memory-Centric Computing: Enabling Fundamentally Efficient & Intelligent Machines | Onur Mutlu | 01h 16m |
Talk argues memory must act as an active accelerator and shows concrete hardware and software work: FPGA-based PiDRAM and Ramulator testbeds, experiments… | ||
| Health Monitoring with Wireless Sensors and Machine Learning | Bruce M. Maggs | 01h 13m |
A wall-mounted Emerald device sends low-power microwaves, records reflections, and uploads FFT-processed frames to cloud neural nets; the system uses… | ||
| Hardware Constraints | Mark Horowitz | 01h 18m |
Argues that Moore-style cost scaling has stopped around 45 nm so cost per transistor stalls post-45nm, and that the practical response is massive… | ||
| Reconfigurable Architectures: Generalities,Open-source and emerging-technologies | Pierre-Emmanuel Gaillardon | 01h 18m |
Covers FPGA microarchitecture: fractionable LUTs, CLBs with dedicated carry chains and DSP macros, and island-style routing plus placement/routing tradeoffs… | ||
| How do to do research with Systems Researchers | Martin Farach-Colton | 01h 16m |
Covers concrete claims and artifacts: replacing B-trees with write‑optimized structures (a B-epsilon tree) yields up to a 200x speedup on random inserts… | ||
| The "Compute Continuum" ... and its Energetics | Jan Rabaey | 01h 00m |
Vision frames a single, distributed computer from edge sensors to cloud but energy breaks it: data generation outpaces transmission and storage, datacenter… | ||
| Real In-Memory Processing | Ronny Ronen, Orian Leitsdorf, Prof. Ben Hur | 01h 05m |
Claims a working memristive memory processing unit (mMPU (memristive MPU)) that implements MAGIC NOR stateful logic across 512×512 crossbars and exposes three… | ||
| Talk by Rob Johnson (VM Ware) | Rob Johnson | 01h 06m |
A concrete solution called mosaic pages groups k regular 4KB pages so a single TLB row covers multiple pages while avoiding physical contiguity by compressing… | ||
| Automated design space exploration and generation of AI accelerators | Priyanka Raina | 01h 06m |
A high-level HLS-based generator converts parameterized C++ templates into synthesis-ready Verilog, runs PyTorch->TorchDynamo graphs through quantization… | ||
| Advancing Digital Design: Challenges and Solutions | Giovanni de Micheli | 01h 15m |
Computing demand hits 50 gigawatts in 2025 with 15% yearly growth, so the claim is that heterogeneous integration and new substrates must be evaluated with new… | ||
| Talk by I-Ting Angelina Lee (Washington University in St. Louis) | I-Ting Angelina Lee | 01h 13m |
Introduces a concrete solution for legacy-interoperable task-parallel stacks: a Thread-Local Memory Map (TLMM) plus a prototype runtime called Cilk-M that… | ||
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