Machine Learning Acceleration in an Embedded World
summary
Four short systems with concrete claims and artifacts: a crossbar-friendly DNN pruning method that extracts reusable segment shapes to map many filters into the same ReRAM crossbar, reporting up to 14× acceleration and large crossbar-area reduction; ReaDy, a ReRAM PIM accelerator for dynamic GCNs that uses hierarchical PEs, redundancy-free scheduling and crossbar mapping, claiming ~27× speedup vs PyG GPU and ~18× energy reduction; a multiplier‑free, event‑driven SNN FPGA showing ~10× throughput and ~15× energy gain versus prior FPGA SNNs; and ViA, an FPGA vision‑Transformer accelerator using layer splitting and DSE, reporting ~60× speedup and ≈200× energy efficiency over CPU baselines.
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chapters (11)
- 0:00Start
- 1:31Iphone Liu
- 11:48Projection Value-Based Selection Algorithm
- 37:43Spiking Neural Networks
- 37:56Problem Statement
- 40:07The Spiking Neural Networks
- 40:23Integrate and Fire Model
- 46:43How Are the Membrane Potentials Stored
- 50:25Accuracy
- 1:01:24Design the Vi Architecture
- 1:03:36Design Space Exploration
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