European Processor Initiative
summary
A Europe-wide program launches a family of HPC-grade chips aimed at both supercomputers and automotive class‑4/5 workloads, coordinating 26 partners and planning a commercial spin‑out. The roadmap starts with generation 1 uses existing IP to ship quickly, then moves to in‑house designs and broader product variants. Architecture centers on a RISC-V core with domain accelerators, heterogeneous clusters and FPGA blocks; EDA tool vendors are undecided and open‑source contributions remain limited.
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chapters (4)
- 0:00Start
- 4:16EUROHPC DECLARATION
- 7:22DRIVERS OF THE EPI PROPOSAL (2)
- 12:42GPP AND COMMON PLATFORM ARCHITECTURE
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