Hackathon Presentations
Talkat RISC-V Summit North America 2024 · on Wednesday, 2024-10-23· at 14:00· Expo Hall - Exhibit Hall A - Demo Theater·
summary
Students extend a RISC‑V CPU register file with real ECC prototypes using Codp Studio, trying Codp Studio register-file ECC with Hamming 38/32, 7‑4 Hamming and BCH(15,7) variants; one team reaches single‑bit correction across 32‑bit lanes while another aims for two‑error BCH at 60 bits per register. A separate group implements processing‑in‑memory for an A‑style benchmark and reports PIM offload yields 10x speedup*, 56× fewer bytes read by CPU and large cache‑miss reductions. A third group vectorizes softmax with RVV and polynomial approximations on Andes Ace toolchain.
AI-written summary · about
chapters (8)
- 0:00Introduction to hackathons
- 1:08Codasip challenge overview
- 3:48Student ECC solutions
- 11:57Alternative error solutions
- 17:44Tactical Computing challenge
- 21:29PIM performance results
- 38:14Andes optimization challenge
- 44:51Conclusion and awards








