Profiling data structures
summary
Combines hardware sampling and type-aware layout introspection to find false sharing and hot fields: uses perf record -a mem-loads with PEBS/C2C load-latency sampling (often filtering >30 cycles) and maps offsets back with pahole + BTF to identify cache-line offsets; demonstrates fixes that work (cacheline_align or member reordering moved parent/usage to different lines, improving counters and page-stats), and prototypes kernel-side BPF aggregation to scale analysis and auto-suggest layout changes.
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chapters (13)
- 0:00Introduction to talk
- 1:05Data structures and cache efficiency
- 2:34Hardware support for optimization
- 4:43False sharing and cache line issues
- 9:17Introducing perf c2c
- 13:16Hardware tracing tools
- 15:27Perf load latency and c2c
- 22:13Perf workflow and data analysis
- 27:17Automating data structure analysis
- 33:08Compiler and tool limitations
- 35:23BPF and perf integration
- 36:48Future of data structure annotation
- 37:32Q&A session
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