Latency hints for CFS task
summary
Proposal adds a new task class field (populated from Intel Thread Director) and uses it as a tie‑breaker in the idle load balancer so CFS prefers the runqueue whose tasks gain most from big cores. Implementation reads the CPU feedback register on user ticks, patches add idle-path placement and a stop‑the‑CPUs swap path for busy cases; measured IPC difference is about IPC 1.27 (p‑core ≈ “5.6 GHz equivalent”), and EAS is avoided due to SMT and variable energy/performance.
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chapters (8)
- 0:00Introduction to hybrid scheduling
- 2:27Hardware performance differences
- 8:27Intel Thread Director overview
- 15:12Proposed scheduler changes
- 25:48Task swapping for throughput
- 31:59Load balancing and fairness
- 37:13Energy Aware Scheduling challenges
- 39:17Q&A and closing remarks
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