CORE-V CVA6, an open-source RISC-V application core supported by the EU

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" summary

An industrialized RISC‑V application core derived from Ariane, CVA6 supports 32/64-bit Linux with L1 caches, AXI4, machine/supervisor modes, OpenSBI, U‑Boot, GCC, Yocto/Buildroot and GDB server; an FPGA demo boots Linux, runs Tetris and remote debug; work halves FPGA resource use so far and targets higher frequency and multi‑core; extensibility uses the CVX interface for accelerators; verification aims for 100% test coverage and the ecosystem receives roughly 80 million euros of EU/KDT funding.

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" chapters (14)

1. 0:00Start
2. 2:11What is RISC-V?
3. 7:16CVA6 architecture
4. 8:20Different cores, one solution
5. 8:58An extendable core
6. 10:02CPU sub-system
7. 11:32HW implementations
8. 12:20SW ecosystem
9. 13:34CVA6 verification
10. 14:08Open-source project OPEN
11. 14:40Open-source is suited for industrial use
12. 15:53First industrial adoptions of the CVA6
13. 23:55RISC-V and open-source HW European opportunities
14. 25:30Conclusion

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