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Sequence Abstractions for Flexible, Line-Rate Network Monitoring

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linkedin:ryanbeckett
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A new system called FLM compiles sequence-monitoring programs to P4 that run on programmable switch ASICs, splitting specs into state management plus a regular expression and using SMT-based synthesis to produce a tiny microprogram. The paper shows 15 real monitoring tasks map to DFAs of 4–19 states and 2–32 symbols, the compiled P4 fits hardware pipeline stages and adds under 15% extra header fields and instruction words, and typical compilation plus vendor P4 compile time is about 2 minutes.

AI-written summary · about

  1. 0:00Sequence abstractions for monitoring
  2. 2:46FLM system architecture
  3. 3:52Detecting DHCP misuse
  4. 7:49Compiling FLM patterns to hardware
  5. 12:44Evaluating FLM flexibility and performance
  6. 15:32Summary
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