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Precise Data Center Traffic Engineering with Constrained Hardware Resources

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name:Rui Wang
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System adapts switch memory allocation to flow volume and precision loss, prunes select ports and merges identical weight distributions to implement TE on constrained hardware. Two reduction algorithms are implemented: a mixed integer solver and a greedy search that apply group sharing, table carving, and table pruning to fit groups into limited entries. Evaluation on realistic traces shows TE is approximated within 7% error versus 67% for prior table fitting, avoids rule overflow, and runs about 10× faster.

AI-written summary · about

  1. 0:00Introduction
  2. 2:04How TE works
  3. 3:47Limited switch memory
  4. 5:33Precision loss effects
  5. 7:43Root causes of precision loss
  6. 10:09Limitations of group reduction
  7. 11:52New heuristics for group reduction
  8. 12:14DMIR and IGR algorithms
  9. 13:58Evaluation: link utilization & flow completion
  10. 15:22Performance speed & comparison
  11. 16:29Summary
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