Sirius: Composing Network Function Chains into P4-Capable Edge Gateways

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" summary

System composes dozens of distinct NF chains into a single P4 program, synthesizing traffic identification tables, pipelining loops via recirculations, and partitioning to CPU when ASIC memory is insufficient. Implementation generates a switch P4 program (one real instance reaches ~16,000 lines, 248 tables, four pipelines), handles long chains (up to 26 dependency tables, 10 chains per gateway, 127 loops when naively merged), runs synthesis in minutes, and is deployed across hundreds of gateways, cutting developer effort from weeks to minutes.

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" chapters (9)

1. 0:00Sirius and edge gateways
2. 1:06Network functions in switches
3. 4:15P4 program challenges
4. 6:25Sirius architecture
5. 8:50Memory and loop constraints
6. 10:58Pipelining candidates
7. 12:45Partitioning to CPU
8. 14:10Evaluation and gains
9. 15:12Conclusion

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