~/talk

Early Code Coverage Analysis Using RISC-V Virtual Platforms

Talkat RISC-V at embedded world 2024 · on Wednesday, 2024-04-10· at 15:00· Hall 5, Stand 5-119· [embedded-and-hardware]
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RISC-V virtual platforms produce non‑intrusive code coverage from full system simulation: a Sim5 simulator runs Zephyr with a TCP server, the test client sends specific commands (G, M, H) and the platform records a trace file that the VP C tool converts into a standard coverage report. The demo shows uncovered code becoming covered after sending distinct inputs, runs entirely before hardware exists, and scales to thousands of parallel instances for CI integration.

AI-written summary · about

  1. 0:00Introduction
  2. 2:13Software complexity challenges
  3. 3:57Code coverage analysis basics
  4. 6:01Demo setup overview
  5. 8:30Live coverage analysis demo
  6. 10:55Summary and benefits
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