Zero Trust Hardware Design for Embedded Systems
summary
Zero trust applied to embedded drones with concrete chips rather than theory: two RISC‑V SOCs are taped out — Shaheen as a small test chip and Alsaker taped out about six weeks ago — and Alsaker integrates OpenTitan+Ibex, two CVA6 cores, a PULP cluster, logic locking and hypervisor extensions. Continuous monitoring runs as an ML‑based CFI and an AI runtime assurance, lifecycle defenses include foundry distrust mechanisms, code and designs are open source on GitHub and a V2 with more zero‑trust features is underway.
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chapters (10)
- 0:00Introduction
- 0:16What is TI
- 1:10Secure System Research Center SSRC
- 1:45Zero Trust
- 2:40Attack vectors
- 3:36Security
- 4:20Security Philosophy
- 7:23Collaborations
- 8:24Open Source
- 9:06Conclusion
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