FlowBlaze: Stateful Packet Processing in Hardware
summary
FlowBlaze is an open abstraction for programming stateful packet processing on programmable NICs and FPGAs using Extended Finite State Machines with explicit per-flow state. It targets high-performance hardware (NetFPGA SmartNIC) and emphasizes flow-level parallelism to support hundreds of thousands of per-flow states at line rates (40 Gb/s), low microsecond latency, and modest power use, with both hardware and software implementations available.
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chapters (14)
- 0:00Start
- 2:12Making programming easier
- 3:05Match-Action Abstraction Limitations
- 3:57Extending Match-Action abstractions
- 4:12Match-Action vs Finite State Machine (FSM)
- 5:16Multiple state machines?
- 6:38Introducing per-flow state
- 7:57Handling variable insertion time
- 8:46Flow context insertion handling
- 10:09Implementation issues
- 10:28Avoiding race conditions
- 12:22Does it work?
- 14:27Stress test
- 17:32Conclusion
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