Squeezing the Hardware to Make Performance Juice
summary
Benchmarks show concrete wins: using System.Numerics.Vectors in C# yields about 5× speedup with Vector<float> for matrix and normalization kernels, a handwritten SIMD C routine gives 9× substring search via SIMD intrinsics versus managed Contains, and optimized dot product hits ~23 GB/s memory-bound throughput vs 25.3 GB/s theoretical peak, exposing a memory bandwidth ceiling. Demos also show cache-line false sharing, loop-stream detector effects, JIT range-check costs, and recommends Intel tools like Advisor/VTune and platform intrinsics.
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chapters (22)
- 0:00Intro
- 2:09A Modern Processor
- 4:54Processor Organization: Intel Nehalem+
- 7:43Skylake Backend (sustained 4 uops/cycle)
- 9:55Intel Top-Down Approach
- 12:25Processor Behavior: Branch Prediction
- 16:19Processor Behavior: ILP
- 19:19Processor Behavior: Vector Units
- 20:18Processor Behavior: Parallelization
- 23:55Categories of Vector Instructions
- 25:15Instruction Performance
- 28:49Vectorization: Matrix Multiplication
- 33:49Vectorization: Vector Normalization
- 35:21Vectorization: AoS vs. SOA
- 36:41Vectorization: N-Body Simulation
- 39:40Vectorized strstr Illustrated
- 42:03Vectorization: strstr
- 43:47Vectorization: Sorted Set Intersection
- 47:16Cache Structure, typical i5 (no L4 EDRAM)
- 49:55Cache: Data Access Reordering
- 52:00Cache: Tiling
- 52:47Memory Bottleneck
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