Loop Saturation for Scalable High-Level Synthesis
summary
Prototype Python tooling uses egg based equality saturation to perform loop saturation via array injection, IR detection, loop rerolling and code extraction on autogenerated Fiat Cryptography C. It converts straight‑line sequences into for‑loops that HLS treats as reusable hardware, yielding three concrete benchmark conversions that cut synthesized area substantially while accepting a measurable latency increase (parallel → pipelined/sequential). Current prototype works end‑to‑end but depends on generator patterns and lacks an HLS cost model for extraction.
AI-written summary · about
chapters (11)
- 0:00Loop Saturation for HLS intro
- 1:48High-Level Synthesis background
- 6:45Loop optimization motivation
- 8:11Key insight and case study
- 13:08Loop injection and rerolling
- 15:40Fiat Cryptography results
- 17:31Limitations and future work
- 18:35Conclusion and design space
- 19:19Q&A 1
- 20:26Q&A 2
- 21:52Q&A 3
related talks
30mAutomated High-Level Synthesis Design Modularization via E-Graph Anti-Unification
22mSirop: A Small IR for HLS with Parallel Patterns
19mLoop Rerolling for Hardware Decompilation
30megg: Fast and Extensible Equality Saturation
27mDistributing and Parallelizing Non-canonical Loops
21mImproving Equality Saturation for EDA via Semantic E-Graphs
24mOptimism in Equality Saturation
01h 10mHardware DSLs