Going Nowhere Faster
summary
Benchmark shows random-index probes reveal cache boundaries on an AMD Epyc: L1D ≈ 64 KB, L2 ≈ 512 KB, L3 ≈ 16 MB, with throughput falling from ~18 GB/s to ~15 GB/s at L1 pressure and later cratering near L3, and L1 miss rates jumping from ~0.01% to ~0.04% then to percent-level. Uses Google Benchmark, perf stat and perf list counters to confirm L1D misses, and demonstrates a tiny clamp loop where a conditional move (cmov) and an explicit branch are compared — surprisingly the branch can beat cmov depending on micro-op scheduling; Intel Architecture Code Analyzer is recommended for deeper pipeline analysis.
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chapters (38)
- 0:00Intro
- 3:10Performance
- 6:20Profiling
- 11:00Benchmarking
- 17:15Performance Monitoring
- 19:40Cache Metrics
- 22:15Benchmark Libraries
- 23:45Clamp Loop
- 25:40Client Benchmark
- 28:40Faster Mod
- 29:35C Move
- 31:30Faster Branch Prediction
- 33:15Fancy Clamp
- 33:35Not Fancy Clamp
- 34:30Test Addthis
- 36:00Slides
- 36:55Microcode
- 37:15Notation
- 37:35Load
- 38:05MacroOpFusion
- 39:25Inversion
- 39:45Reorder Buffer
- 40:10Register Rename
- 40:50Speculative Execution
- 41:05Execution Units
- 41:50Execution Cycles
- 43:50Execution Latency
- 44:25Fully Packed Execution
- 46:15Speculation
- 47:25Intel Code Analyzer
- 48:15Performance Counters
- 50:20Questions
- 51:50Annotations
- 53:35Comparing literals to registers
- 54:30Store buffer
- 55:25EVX
- 56:00Builtin expect annotations
- 59:20LLVM
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