~/talk

AI custom Software/Hardware Interface improving performance 5-10x

Talkat RISC-V Summit Europe 2024 · 2024-06-24..06-28· [embedded-and-hardware]
links:none on file
slides:none on file

Customizing a RISC‑V core via Codasip Studio’s Codasip Fusion adds bounded micro‑accelerators (about 3,000 lines of RTL) to speed a sensor + MCU anomaly detector: an AI Mac instruction for 8‑bit MACs and a new single‑cycle unaligned loads op are created from a software model, about 40 custom ops in ~1 month, yielding ~4.36× application speedup (claims up to 5–10×) and 4.36× performance and 7× lower power measured post‑synthesis on RTL while preserving core verification.

AI-written summary · about

  1. 0:00Introduction and overview
  2. 1:05AI at the edge project
  3. 2:12Performance challenges and goals
  4. 3:15Fusion software interface
  5. 4:59Custom instruction creation
  6. 6:22Auto-aligning instruction demo
  7. 7:28Performance improvements achieved
  8. 8:55Power reduction results
  9. 9:155-10x performance gains summary
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