From Raw To Refined: The Evolution of Raw Flash Support in Linux
summary
MTD adds real features: SPI NAND lands as first‑class storage, OTP hooks appear (SPI-NAND since 5.13, spine since 6.15), SLC pseudo‑mode merges (5.8) to avoid fragile MLC, and flashspeed benchmark measures sequential cached reads (subsystem work from 6.3, stabilized by 6.8) plus bus advances—quad/octal/DTR/DTR‑DDR and calibration. Measured wins include an octal+calibration jump from 2.3→34 MB/s and a 5× throughput on a TI/Windbond setup. Expect ongoing controller ECC offload and flexible dummy‑cycle selection.
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chapters (15)
- 0:00Raw flash support in Linux
- 3:12OTP in MTD evolution
- 5:47SLC mode for MLC NAND
- 8:17NAND read latencies
- 10:47Host-side flash optimizations
- 12:52ECC offloading in SPI NAND
- 14:39Read while write in SPI NAND
- 16:07Sequential cached NAND reads
- 19:00Parallel NAND interface
- 20:45Dual/quad SPI modes
- 22:52Octal SPI and DDR modes
- 25:52Stateful modes and dummy cycles
- 28:00Calibrating SPI bus delays
- 31:54Performance gains with calibration
- 32:36Q&A on OTP and MLC
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