Megahertz, Gigahertz, Registers and Instructions: How does a CPU actually work?
summary
Modern CPUs implement a modified Harvard/von Neumann model: tiny fast registers feed an ALU and control unit, programs are sequences of instructions (x86/ARM differences come from instruction sets), and a hardware stack supports call/return. Example assembly shows simple add requires multiple moves; pipelining and speculative execution hide the 5‑stage fetch/decode/execute/writeback sequence. Clock example: 3 GHz = 0.33 ns; caches cost roughly L1 ≈ 4 cycles, L2 ≈ 12, L3 ≈ 36 and main memory ~RAM ≈ 200 cycles. Context switch costs ~50 ns to kernel mode and ~3000 ns between threads, so avoid over‑threading and unnecessary allocations.
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chapters (17)
- 0:00Introduction
- 1:38Starting from scratch
- 3:21Instruction storage
- 7:05Instruction sets
- 7:29Basic math
- 11:17Registers
- 16:19Stack Pointer
- 18:24Adding Registers
- 21:11Comparing Registers
- 24:30Do More Math
- 28:35Passing variables
- 31:10Instruction cycle
- 34:32System clock
- 38:20The problem
- 42:36Memory
- 49:06Thread Execution
- 55:59Instruction set
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