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Safety-critical systems from the inside

Talkat NDC Oslo 2020 · 2020-06-08..06-12· [software-architecture]
slides:none on file

Shows concrete engineering choices: design hardware so a valve defaults closed so gas flow stops (fail-safe), use two CPUs exchanging a timed square wave to detect clock faults and three-channel voting (aerospace-style) to mask single failures, move a TCP/IP stack onto a separate processor to implement mixed criticality, store a value plus its bitwise negation to detect memory corruption, and prefer Ada/SPARK or MISRA subsets when formal checks (no runtime errors) and long-term reproducible builds are required.

AI-written summary · about

  1. 0:00Intro
  2. 0:26MACIEJ GAJDZICA
  3. 1:36SYSTEM WHOSE MALFUNCTI CAN LEAD TO
  4. 2:26SAFETY VS SECURITY
  5. 3:13SAFETY VS RELIABILITY
  6. 4:23Risk: cutting fingers
  7. 5:13Risk: burning everything
  8. 6:54SAFETY INTEGRITY LEVEL SIL
  9. 8:29FAIL SAFE
  10. 10:50CPU ERRORS
  11. 11:58HOW TO DETECT CLOCK FAIL
  12. 13:35REDUNDANCY
  13. 15:14SAFE COMMUNICATION
  14. 18:26PROBLEM
  15. 20:14SOLUTION
  16. 21:46MIXED CRITICALITY
  17. 22:41DATA CORRUPTION
  18. 25:55uint32_t const value; uint32_t const value_inv
  19. 30:40FORMAL PROOF
  20. 31:58ADA SPARK
  21. 33:12LANGUAGE SUBSETS
  22. 35:33EFFECTIVE DOCUMENTATION
  23. 36:57VERSION MANAGEMENT
  24. 40:19PEOPLE AND PROCESSES
  25. 41:29ROOT CAUSE ANALYSIS
  26. 43:16FEEDBACK LOOP
  27. 44:36Engineering a Safer World
  28. 49:29PROJECT ROLES - SIL4
  29. 52:59ADDITIONAL RESOURCES
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