How Dealing with Modern Interrupt Architectures can Affect Your Sanity
summary
Linux now composes interrupt handling from reusable pieces so complex controllers, MSI bridges and cascades map into irqdomain and irqchip hierarchies; irq data becomes a standalone structure with parent pointers so the kernel walks chains in signal order and can mask or cut processing early. Two MSI ops — a compose_message and a device-specific program function — let PCI and platform MSI coexist (MSI-X supports up to ~2K vectors). Examples: a SoC had 256 pins but 300+ IRQ users; Freescale bus glue is ~80 lines and the implementation is mainline and working.
AI-written summary · about
chapters (14)
- 0:00Introduction to interrupts
- 2:13Interrupt controllers
- 4:28Triggering and representation
- 6:53Linux data structures
- 11:33Basic interrupt handling
- 13:04Cascaded interrupt controllers
- 18:18Stackable interrupt controllers
- 20:55Implementation of stacked IRQs
- 28:16Message signaled interrupts
- 34:25Hierarchical MSI domains
- 39:31Platform MSI handling
- 41:41Wire-to-MSI bridges
- 47:55Complex system example
- 51:45Conclusion
related talks
42mUnderstanding Linux Interrupt Subsystem
33m[x86] Linux Kernel Interrupt Delivery Configuration: How the Linux Kernel Interacts...
47mWhat Every Driver Developer Should Know about RT
34mA Journey into Linux Interrupt Handling Bottom Halves
30mLook Ma’, No (Real) Interrupt Controller!
42mProtecting the Linux Kernel from Confidential Computing Threats in Virtual Environments
20mRISC-V irqbypass with KVM
08mBringing Energy-Aware Scheduling to x86