AIE-ML dev PMD for VRAN and UPF Datapath Acceleration
summary
Proof of concept implements a virtual VF device that probes XRT for a V70 DSP or falls back to ZenDNN via ONNX on CPU, aiming to boost VRAN instances from three toward five on the same 64‑core EPYC by saving CPU threads via offload of channel estimation and equalization. It uses ring‑buffer plus control thread per ML device to queue NQ/DQ work, exposes DMA regions to cut copies, integrates with DPDK 23.1, and currently has a single‑worker/queue and no telemetry.
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chapters (8)
- 0:00Introduction and agenda
- 1:02Problem statement and customer challenge
- 3:31ML acceleration requirements and flexibility
- 5:18Solution design and virtual device approach
- 7:03Implementation details and ring buffer model
- 8:50Opportunities and future enhancements
- 10:41Current limitations and next steps
- 11:25Summary and Q&A
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