Introduction to Vector Parallelism
summary
Vector parallelism on CPUs (SSE, AVX, AVX‑512, NEON, Altivec) claims typical 4–16× speedup by processing lanes in lockstep using wide registers, masks and remainder loops; it removes OS scheduling, costs less silicon and energy, and relies on masked execution and wavefront ordering to preserve serial semantics. Compilers auto-vectorize when aliasing, alignment and opaque calls permit; explicit routes include OpenMP SIMD pragmas, SIMD libraries (Boost.SIMD) and Intel’s simd data layout tools and compiler reports to confirm results.
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chapters (28)
- 0:00Intro
- 1:48Who am I
- 2:57What is vector programming
- 4:14Trunking
- 6:30Assembly Register
- 7:38Registers
- 8:56Control Flow Divergence
- 11:53Standard Analogy
- 18:19Dependencies
- 21:00Energy Savings
- 22:46Limitations
- 24:50GPUs
- 28:15What about Cindy
- 28:53C
- 29:07Dataparallel
- 30:40Wavefronts
- 33:36Vectorization
- 35:38AutoVectorization
- 38:04For Loop
- 41:14Inlining
- 42:15OpenMP
- 48:30Reductions
- 51:37Class Libraries
- 52:16Boost
- 54:15Alignment
- 55:00Data Layout
- 55:51Vector Parallelism
- 56:14Questions
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