Vectorizing Sparse Coiteration for Two-finger Loop Structure (Extended Abstract)
summary
Proposes an MLIR optimization pass that turns compressed-hierarchy sparse co-iteration SCF loops into a dual-path execution: a predicated, vectorized fast lane guarded by runtime bounds checks plus a scalar slow lane epilogue. Implements on the sparse tensor dialect and lowers through the Vector dialect to LLVM, evaluated on an Intel Xeon Gold (Sapphire Rapids) with AVX-512. Reports a peak 277x microbenchmark speedup, a 2.39x geometric speedup across kernels (SpGEMM, SpMV, MTTKRP), and finds vector width four as the best tuning point for many sparsities.
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chapters (16)
- 0:00Sparse tensor coiteration intro
- 1:00Sparse matrix multiply basics
- 2:26Dense vs sparse multiply
- 3:30Iteration graph for sparse tensors
- 4:37Two-finger loop structure
- 6:25Vectorizing sparse loops challenges
- 7:08Manual vectorization strategy
- 8:56Vectorized data loading and masking
- 10:26Pointer advancement vectorized
- 12:09MLIR sparse tensor dialect
- 13:55Vector and scalar stages config
- 14:37Performance on Intel Xeon Gold
- 15:41Vector width and sparsity ablation
- 16:43Synthetic and real-world results
- 17:49Outerloop parallelism scalability
- 18:11Summary and future
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