Zdenek Prikryl
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- RISC-V Summit North America2 editions2023–2025
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| title | conference | date |
|---|---|---|
| RISC-V Custom Instructions for Automotive Control and DSP Algorithms Compliant with ISO 26262 | RISC-V Summit Europe 2026 | 2026-06-08 |
Claim: Codasip and Bosch demonstrate a bounded customization flow that keeps ISO 26262 compliance while adding RISC‑V custom instructions via Codasip Studio to… | ||
| RISC-V Customization After a Tape-out | RISC-V Summit North America 2025 | 2025-10-22 |
Demonstration shows post-tape-out ISA extension by mapping a new RISC-V custom instruction into an on-chip e-FPGA, using Codasip L110 plus Studio (kodal → RTL… | ||
| Efficient RISC-V Processor Customization: Minimizing Verification Efforts | RISC-V Summit North America 2025 | 2025-10-22 |
Codasip ships a Bounded Customization methodology that confines extensions to a sandbox and enforces rules via a YAML config so the rest of the core never… | ||
| Fast Virtual Platforms for Custom RISC-V Processors | RISC-V at embedded world 2024 | 2024-04-09 |
Claim: an end-to-end flow turns a single CODAL description into RTL, an LLVM-aware SDK, and a Sim5 plugin for MachineWare virtual platforms so teams can run… | ||
| Demo: RISC-V as an Enabler of Heterogeneous Compute | RISC-V Summit North America 2023 | 2023-11-06 |
Codasip studio customizes an L31 RISC-V core in Codal, adds three ISA extensions and shows they actually improve real code. The LLVM-based toolchain… | ||
| A RISC V ISA Extension for Ultra Low Power IoT Wireless Signal Processing | RISC-V Summit 2019 | 2019-12-09 |
CEA Leti and Codasip implement a RISC-V extension and microarchitecture tweaks to run LoRa/BLE-style physical layers as software-defined radio on a low-power… | ||
| Code Density Improvements Beyond The C Standard Extension | RISC-V Summit 2019 | 2019-12-09 |
Baseline RISC‑V C extension replaces about 53% of 32/64‑bit ops with 16‑bit, yielding ~27% code‑size reduction. Adding store/load byte/word with full register… | ||
| Challenges in Open-source RISC-V Implementations: Differentiation & Customization | Week of Open Source Hardware 2019 | 2019-06-13 |
A RISC-V IP family called BK3 BK5 BK7 is fully configurable and claimed verified (VM-based coverage and verification plans) and the mandatory RISC-V subset is… | ||
| Poster / Demo Previews | 8th RISC-V Workshop Barcelona 2018 | 2018-05-07 |
Poster session previews list concrete results and demos to see: a quantum‑resistant secure boot shows large speedups on HiFive hardware; CGEN generates… | ||
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