Yongqiang Xiong
where else to find them
what they talk about
all 5 in the filters
where they keep going back
- NSDI2 editions2019–2023
all 7 in the filters
on a stage with
- Peng Cheng6×
- Lei Qu3×
- Ran Shu3×
all 82 in the filters
who talks about the same things
nobody close enough yet
| title | conference | date |
|---|---|---|
| SmartNIC-Enabled Live Migration for Storage-Optimized VMs with PYROCUMULUS | NSDI '26 | 2026-05-04 |
Pyrocumulus offloads live migration of storage-optimized VMs into an FPGA SmartNIC running ~16K lines of SystemVerilog on an Intel Arria 10, attached to Intel… | ||
| Offloading Cloud Network Services at Production Scale | NSDI '26 | 2026-05-04 |
Microsoft deploys SONiC DASH SmartSwitch: an immutable DASH pipeline programming model plus a uni-box SmartSwitch that co-locates NPU and up to eight DPUs and… | ||
| 3L-Cache: Low Overhead and Precise Learning-based Eviction Policy for Caches | FAST '25 | 2025-02-25 |
3L-Cache is an object-level learning eviction policy that uses GBM prediction, sampled training windows, bidirectional sampling, and heap+hash matching to cut… | ||
| SuperBench: Improving Cloud AI Infrastructure Reliability with Proactive Validation | USENIX ATC 2024 | 2024-07-10 |
SuperBench is a proactive validation system that runs a comprehensive benchmark suite (end‑to‑end and microbenchmarks), uses a Validator that learns benchmark… | ||
| ARK: GPU-driven Code Execution for Distributed Deep Learning | NSDI 2023 | 2023-04-17 |
Claims a GPU-driven I/O path that lets GPU threads initiate DMA and run a single persistent GPU loop kernel so GPUs handle control and scheduling autonomously… | ||
| NetKernel: Making Network Stack Part of the Virtualized Infrastructure | USENIX ATC '20 | 2020-07-15 |
NetKernel decouples the TCP/IP stack into an operator-run network stack module implemented as a VM, redirecting BSD socket calls via a guest shim into… | ||
| Accelerating Rule-matching Systems with Learned Rankers | USENIX ATC '19 | 2019-07-10 |
A learned ranker classifies which regex rules to try first, implemented as a neural model trained with generated and logged inputs and evaluated on PCRE… | ||
| Direct Universal Access: Making Data Center Resources Available to FPGA | NSDI 2019 | 2019-02-26 |
DUA implements an FPGA-side IP layer plus a CPU control plane that uses server IPs as top-level names to give FPGAs global names and a unified socket-like… | ||
| Multi-Path Transport for RDMA in Datacenters | NSDI '18 | 2018-04-09 |
MP-RDMA presents a concrete design and FPGA prototype that adds only 66B per connection and achieves line-rate sending/receiving with sub-microsecond latency… | ||
| nothing matches | ||