Peng Cheng
where else to find them
no profile links on file
what they talk about
all 5 in the filters
where they keep going back
- NSDI2 editions2019–2023
all 7 in the filters
on a stage with
all 71 in the filters
who talks about the same things
nobody close enough yet
| title | conference | date |
|---|---|---|
| SmartNIC-Enabled Live Migration for Storage-Optimized VMs with PYROCUMULUS | NSDI '26 | 2026-05-04 |
Pyrocumulus offloads live migration of storage-optimized VMs into an FPGA SmartNIC running ~16K lines of SystemVerilog on an Intel Arria 10, attached to Intel… | ||
| SuperBench: Improving Cloud AI Infrastructure Reliability with Proactive Validation | USENIX ATC 2024 | 2024-07-10 |
SuperBench is a proactive validation system that runs a comprehensive benchmark suite (end‑to‑end and microbenchmarks), uses a Validator that learns benchmark… | ||
| POSEIDON: A Consolidated Virtual Network Controller that Manages Millions of Tenants... | 21st USENIX Symposium on Networked Systems Design and Implementation (NSDI '24) | 2024-04-16 |
Poseidon is a consolidated virtual network controller deployed on Alibaba Cloud for 3+ years that replaces 50+ service controllers with a unified… | ||
| ARK: GPU-driven Code Execution for Distributed Deep Learning | NSDI 2023 | 2023-04-17 |
Claims a GPU-driven I/O path that lets GPU threads initiate DMA and run a single persistent GPU loop kernel so GPUs handle control and scheduling autonomously… | ||
| PilotFish: Harvesting Free Cycles of Cloud Gaming with Deep Learning Training | USENIX ATC '22 | 2022-07-11 |
PilotFish co-locates deep learning training with cloud gaming, hooks DirectX/OpenGL to capture idle GPU periods in sub-millisecond granularity, and schedules… | ||
| NetKernel: Making Network Stack Part of the Virtualized Infrastructure | USENIX ATC '20 | 2020-07-15 |
NetKernel decouples the TCP/IP stack into an operator-run network stack module implemented as a VM, redirecting BSD socket calls via a guest shim into… | ||
| Direct Universal Access: Making Data Center Resources Available to FPGA | NSDI 2019 | 2019-02-26 |
DUA implements an FPGA-side IP layer plus a CPU control plane that uses server IPs as top-level names to give FPGAs global names and a unified socket-like… | ||
| Multi-Path Transport for RDMA in Datacenters | NSDI '18 | 2018-04-09 |
MP-RDMA presents a concrete design and FPGA prototype that adds only 66B per connection and achieves line-rate sending/receiving with sub-microsecond latency… | ||
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