Christophe Dubach
where else to find them
what they talk about
all 4 in the filters
where they keep going back
no series more than once — all 5 in the filters
on a stage with
all 16 in the filters
who talks about the same things
nobody close enough yet
| title | conference | date |
|---|---|---|
| Sirop: A Small IR for HLS with Parallel Patterns | LCTES 2026 | 2026-06-15 |
A minimal functional IR called Sirop expresses pipelining and spatial parallelism with five primitives and lowers map/zip/reduce as syntactic sugar, enabling… | ||
| A Functional Approach to Synthesizing Routable Programmable Accelerators for Neural(…) | LCTES 2026 | 2026-06-15 |
A functional IR uses Reduce and SwitchApply primitives plus upper-bounded streams to turn shared functions into programmable datapath+control that avoids… | ||
| Sound and Modular Activity Analysis for Automatic Differentiation in MLIR | OOPSLA 2025 | 2025-10-16 |
Implements a sound abstract interpretation of activity analysis inside MLIR, formalizing an MLIR subset amenable to AD and proving correctness; adds a modular… | ||
| Generating High Performance Code for Irregular Data Structures using Dependent Types | FHPNC 2021 | 2021-08-22 |
Extends a data-parallel language with index-sequence types (nuts), a scoping primitive (lift_nut / lift_nuts) and dependent pairs so offsets and packed CSR… | ||
| DelayRepay: Delayed Execution for Kernel Fusion in Python | DLS 2020 | 2020-11-17 |
DelayRepay is a drop-in NumPy replacement that defers NumPy operations to build a delayed execution graph, fuses those nodes into single CUDA kernels via CuPy… | ||
| High-Level Synthesis of Functional Patterns with Lift | ARRAY 2019 | 2019-06-22 |
Extends Lift with Lift to VHDL backend and new streaming and tiling patterns, generates synthesizable VHDL that runs on a Xilinx XC7Z010 prototype board… | ||
| nothing matches | ||