Designing Hardware with Python
summary
Python replaces hand‑written Verilog/VHDL for this HDMI capture project by generating synthesizable RTL with Migen/MiSoC and MyHDL, plus KiCad scripting for PCB and UCF pin mapping. A four‑week funded reimplementation adds buffering, a soft‑core CPU (C firmware, candidate for MicroPython), Ethernet and dual‑board support; it runs in production at conferences and DEF CON. Device ships at about $400; licensing moves to BSD/MIT. Expect HDMI2USB.tv hardware, Python-generated Verilog, and USB/debugging via libusb and pyserial.
AI-written summary · about
chapters (24)
- 0:00Intro
- 0:12Tom
- 0:28But I'm also practical
- 0:59Should you use Python for hardware?
- 5:55Two major languages
- 6:10Verilog
- 6:58VHDL
- 9:28Testing?
- 10:42Then new hardware..
- 12:55Milky Mist & Mixxeo
- 15:16Bootstrapping?
- 16:13MiSoC Firmware
- 16:46Lots more features..
- 17:27Softcore advantage..
- 18:14Some downsides...
- 18:46HDMI2USB.tv original firmware
- 21:55Schematics
- 22:30KiCad Plugins
- 23:48Circuit Unit Tests?
- 25:26Hardware Interfaces
- 25:38pyusb
- 27:17USB isn't needed....
- 27:27pyserial
- 29:30Help us!
related talks
34mUsing Python For Creating Hardware To Record FOSS Conferences
03mSynthesize HDL to 7400 logic
11mDoing Hard Things in a Soft Way
43mHacking Hardware using Free Software & GNU/Linux
49mFPGA: creating hardware by programming
10mHow to design your own microchip!!!
17mAccelerating Designs for SoC FPGA Using Simplified High-Level Synthesis Flows
43mGrabbing Audio and Video on a Board Farm