Xvisor: Embedded Hypervisor for RISC-V
Talkat Open Source Summit Europe + Embedded Linux Conference Europe 2019 · on Tuesday, 2019-10-29· at 11:30· Forum 6·
summary
Covers Xvisor, an open-source type-1 monolithic hypervisor for embedded systems, with focus on its RISC-V port. Describes RISC-V hypervisor extensions, the internals of Xvisor on RISC-V, and benefits such as memory footprint and runtime overheads; also notes Xvisor’s multi-architecture support (ARM, RISC-V, x86_64) and its maturity.
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chapters (21)
- 0:00Western Digital
- 0:33Roadmap
- 3:54RISC-V H-Extension: Privilege Mode Changes
- 4:45RISC-V H-Extension: CSR changes
- 5:24RISC-V H-Extension Two-stage MMU
- 6:37RISC-V H-Extension: I/O & Interrupts
- 7:35What is Xvisor ?
- 8:56Xvisor: Traditional Classification
- 10:55Xvisor: Features (Contd.)
- 13:36Xvisor: Key Aspects (Contd.)
- 15:32Xvisor RISC-V: VCPU Context
- 16:19Xvisor RISC-V: Host Interrupts
- 16:57xvisor RISC-V: Context Switch
- 18:18xvisor RISC-V: Guest MMIO Emulation
- 19:05xvisor RISC-V: Guest RAM handling
- 20:34Xvisor RISC-V: SBI Interface
- 21:23xvisor RISC-V: Device tree based configuration
- 22:19xvisor RISC-V: Zero-copy Inter-Guest Transfer
- 23:28xvisor RISC-V: Code Size and Memory Usage
- 24:48xvisor RISC-V: Ideal for Embedded Systems
- 26:02xvisor RISC-V: Current State
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