Block-Based Parallel Programming
summary
NVIDIA presents cuTile, a block (tile)-based kernel model compiled to Tile IR that JITs Python kernels (C++ API coming) and maps array-centric code to GPU threads and tensor cores; matrix multiply reaches “speed of light” performance and a LLAMA 3.1 inference port hits about 93% speed-of-light. Examples include stencil and FFT ports done in weeks, tile shapes must be compile-time powers of two, tiles are immutable value arrays, loads/stores may lower to async blockwide copies, and autotuning guides performance. cuTile Tile IR 93% speed-of-light
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chapters (17)
- 0:00Introduction to GPU computing
- 1:31CPU vs GPU architectures
- 2:53Grid-level programming
- 5:21Challenges with thread-level kernels
- 7:39Introducing tile-level programming
- 9:10Coutile overview and syntax
- 11:33Difference between SIMT and tile models
- 13:46Memory management and mapping
- 16:16Array types and semantics
- 19:04Immutability and compiler optimization
- 21:48Tile constraints and layout
- 24:29Advanced memory and load-store operations
- 27:38Tensor core abstraction
- 29:57Practical examples and performance
- 33:27Applicability across domains
- 35:33Educational resources and conclusion
- 37:20Question and answer session
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