The Future of Microprocessors
summary
Covers why Moore's Law doubles transistors no longer buys single‑thread speed: transistor density rises but clock and scalar performance level off, power and dark silicon constrain usable gates. Shows Amdahl's Law limits speedup with 95% vs 50% parallelism and explains industry response—more cores, SIMD and ML accelerators—not faster scalar cores. Details: Apple SoC with ~57 billion transistors and 11 TOPS NPU, wafer‑scale chips with trillions of transistors reaching 125 PFLOPS, and the costly EUV “tin‑drop” lithography tools.
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chapters (27)
- 0:00Intro
- 1:47First law: Gordon Moore
- 3:18What does this mean?
- 15:54Second law: Gene Amdahl
- 18:23The multicore consensus
- 19:53More transistors aren't as useful
- 24:00Power: Dark silicon
- 25:33Economic problems
- 27:23Node names
- 29:54Economic problems 2
- 30:38Prediction are hard to make
- 32:45Today's leading fabs
- 35:32Lithography
- 39:14Conclusions
- 39:51Leveled off
- 40:17Microarchitecture evolution
- 42:38Architecture evolution
- 43:56A new performance race
- 44:44A modern system on chip
- 45:45Intel's 2019 future roadmap
- 46:20Transistors change again
- 48:40Research directions
- 49:31Chip making evolution
- 50:37Cooling chips directly
- 51:08Wafer scale integration for ML
- 55:38Training compute requirements
- 56:49Outro
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