Performance Optimization in Software Development - Being Friendly to Your Hardware
summary
Claim: real-world hardware limits matter — memory goodput sits around ~10% of theoretical, DDR capacitor speed barely improves across generations, and bank/rank/page geometry and address mapping change performance meaningfully. Demonstrations: micro‑vs‑real benchmarks, memcpy hot paths (including ClickHouse's tuned copy) and compiler/decoder tricks for instruction fusion. Practical tools: hardware performance counters (nonfree to enable) and platform microcode/rep movs. Conclusion: expect specific measurements, concrete numbers, and actionable layout or algorithm changes — not high‑level platitudes; branch predictor matters, measure on real topology.
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chapters (15)
- 0:00Welcome
- 1:10C++ on hardware
- 3:41Dynamic memory basics
- 9:02Memory hierarchy limits
- 15:14Parallel memory access
- 20:56Modern processor core
- 27:13Code density myths
- 31:05Registers and out-of-order
- 36:05Speculative execution risks
- 36:46Branch prediction example
- 42:26Optimizing memcpy
- 47:44Hashing and loop unrolling
- 52:05Why optimization is hard
- 55:00Future instruction sets
- 57:46Q&A
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