SPHT: Scalable Persistent Hardware Transactions
summary
Paper identifies scalability bottlenecks of prior persistent transactional memory designs by measuring on Intel Optane DC PM rather than emulation, proposes SPHT with new concurrency and recovery mechanisms that reduce contention during transaction processing and speed up log replay, and demonstrates concrete gains: up to 2.6x throughput on STAMP and 2.8x faster log replay versus state‑of‑the‑art. Results include microbenchmarks showing which contention points dominate on real PM and a recovery prototype that actually shortens downtime.
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chapters (11)
- 0:00SPHT introduction
- 1:06Transactional memory limits
- 2:30Flash durability challenges
- 3:32Database durability guarantees
- 4:57Transaction processing scalability
- 6:02SPHT design principles
- 8:10Single-market safety
- 9:14SPHT performance
- 10:39Benchmark results
- 11:22Limitations vs SPHT advantages
- 11:43Conclusion & Q&A
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