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Symmetric Memory in PyTorch: 10x Faster GPU Communication for AI

Talkat DevConf.CZ 2026 · on Friday, 2026-06-19· at 14:45· D105 (capacity 300)· [machine-learning]
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Introduces symmetric memory for zero‑copy RDMA in PyTorch using NCCL 2.29 one‑sided APIs, claiming up to 10× lower latency for GPU communication and sub‑10 ms per operation for small messages. Direct GPU pointers share the same virtual address across GPUs via NVLink, avoiding host copies; primitives put_signal, wait_signal, barrier implement one‑sided transfers and synchronization. Integration with torch.compile via a registration API lets operators request symmetric buffers; live demos report ~35% throughput lift for tensor‑parallel LLM inference.

AI-written summary · about

  1. 0:00Symmetric memory in PyTorch
  2. 1:02GPU communication bottleneck
  3. 3:56Overhead of collective ops
  4. 5:17Symmetric memory solution
  5. 7:24What makes memory symmetric
  6. 9:13PyTorch workflow with symmetric memory
  7. 10:37Device-side view on symmetric memory
  8. 11:48Core primitives of symmetric memory
  9. 14:17One-sided ops unlock flexibility
  10. 14:40NCCL 2.29 portability contribution
  11. 16:48torch.compile integration contribution
  12. 20:23NCCL device APIs infrastructure
  13. 23:59Layered architecture of symmetric memory
  14. 24:21NCCL EP for MoE models
  15. 26:10Pre-built symmetric memory collectives
  16. 28:20torch.compile integration details
  17. 30:05Performance on GB200 systems
  18. 31:53Symmetric memory vs NCCL
  19. 32:57Q&A
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