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Rachit Nigam

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Nomads and Anvil makersPLMW @ PLDI 20252025-06-16
Argues that timing is essential for efficient FPGA accelerators and presents a concrete solution: a small core language called filament that embeds clocked…
Talk on
High-Performance Hardware Design with HardcamlLatch-Up 20252025-05-02
Hardcaml is an OCaml embedded DSL that implements a seven primitives core API and uses a syntax‑directed compiler to emit RTL and also alternate…
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Unifying Static and Dynamic Intermediate Languages for Accelerator GeneratorsOOPSLA 20242024-10-20
Piezo is an IL that embeds static timing inside a dynamic Calyx-style language by treating static control as a refinement of dynamic behavior so the compiler…
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Fearless Hardware DesignPLARCH 20232023-06-17
A new HDL called Filament uses a type system to record timing and structural constraints so code is provably safe across all parameter values: it encodes…
Talk
Modular Hardware Design with Timeline TypesPLDI 20232023-06-17
Filament implements timeline types to encode when signals are produced and consumed, enforcing timing and structural constraints for statically scheduled…
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