Unifying Static and Dynamic Intermediate Languages for Accelerator Generators
summary
Piezo is an IL that embeds static timing inside a dynamic Calyx-style language by treating static control as a refinement of dynamic behavior so the compiler can opportunistically convert dynamic modules to static schedules and combine facts across regions. Implemented as a lightweight extension to Calyx and Kix, it powers a Dalia frontend, a systolic-array generator, and a packet scheduler and shows cross-boundary optimizations that reduce register use and lower LUT area and cycle counts versus a pure-dynamic Kix baseline.
AI-written summary · about
chapters (10)
- 0:00Accelerator compilers intro
- 1:10Static vs dynamic hardware
- 5:44Stratified IR challenges
- 8:55Semantic refinement
- 10:20Pietzo language design
- 11:25Unified IR benefits
- 13:52Static control flow
- 14:34Register sharing
- 16:16Performance results
- 17:21Key contributions
related talks
01h 01mThe Static Dynamic JVM – A Many Layered Dive
11mUsing Pyrope To Create Transformable RISC V Architectures
30mAn Incremental Approach to JIT Construction
55mScalable Quantum Compilation With Jasp
01h 01mExpressive Compile Time Parsers
22mJulia - Dynamism and Performance Reconciled by Design
14mCoSSJIT: Combining Static Analysis and Speculation in JIT Compilers
01h 00mBuilding DSLs on Top of KernelF
