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Marno van der Maas

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titleconferencedate
Hands-on Introduction to CHERIRISC-V Summit Europe 2026 Developer Workshops2026-06-08
Hands‑on workshop demonstrates CHERI capability pointers on a real Sonata FPGA board using chariot RTOS and an LLVM toolchain that produces UF2 images…
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Making CHERI AccessibleRISC-V Summit North America 20252025-10-22
LowRISC builds a CHERI-capable Sonata SoC plus an open FPGA evaluation board sold on Mouser and distributed as 100+ boards for experiments, using open PDK45…
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Fully Verified Open SiliconOpen Source Summit Europe 20232023-09-19
OpenTitan presents a full verification pipeline: block and chip-level simulation, FPGA bring-up and imminent tape-out, using commercial EDA (Synopsys, Cadence)…
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