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John Thomson

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Hands-on Introduction to CHERIRISC-V Summit Europe 2026 Developer Workshops2026-06-08
Hands‑on workshop demonstrates CHERI capability pointers on a real Sonata FPGA board using chariot RTOS and an LLVM toolchain that produces UF2 images…
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The Future of Ibex - A Production-grade, Open Source 32-bit RISC-V CoreRISC-V Summit North America 20252025-10-22
A production‑grade 32‑bit RISC‑V core used in multiple tape‑outs and shipping inside OpenTitan silicon that will protect Chromebooks and Google datacenter…
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Making CHERI AccessibleRISC-V Summit North America 20252025-10-22
LowRISC builds a CHERI-capable Sonata SoC plus an open FPGA evaluation board sold on Mouser and distributed as 100+ boards for experiments, using open PDK45…
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