Jon Taylor
where else to find them
no profile links on file
what they talk about
where they keep going back
- RISC-V Summit North America2 editions2023–2024
- embedded world2 editions2022–2023
all 4 in the filters
on a stage with
- Koji Adachionce
who talks about the same things
nobody close enough yet
| title | conference | date |
|---|---|---|
| Software Simulation Is the Key to Success for Customized CPUs and Complex SoCs | RISC-V Summit North America 2024 | 2024-10-22 |
Argues that virtual platforms and fast golden processor models let teams evaluate custom RISC‑V instructions and system tradeoffs far faster than RTL, using… | ||
| ImperasFPM Fast Processor Models | RISC-V at embedded world 2024 | 2024-04-09 |
Imperas FPM uses JIT binary translation of RISC‑V to x86 and claims to boot Linux in seconds where RTL runs at kHz and takes days, and emulators/FPGAs take… | ||
| Demo: Imperas/OVP RISC-V Models: Not Your Grandparents’ ISS | RISC-V Summit North America 2023 | 2023-11-06 |
Imperas provides OVP Fast Processor Models as configurable RISC-V ISSes with ~250 parameters, source-available models and a proprietary engine, available as… | ||
| Using Virtual Platforms to Shift Left Automotive Software Development | RISC-V Summit North America 2023 | 2023-11-06 |
Virtual platforms from Imperas and partners let teams run production binaries on modeled SoCs months before silicon, enabling a proof‑of‑concept that runs… | ||
| The RISC-V Verification Ecosystem with Open Standards and Commercial Tools | RISC-V Summit Europe 2023 | 2023-06-05 |
RISC-V verification requires scaling beyond ad hoc tests to meet one quadrillion cycles of coverage estimated for modern CPUs, a number that RTL simulation at… | ||
| Getting Started with RISC-V Custom Instructions | embedded world 2023 | 2023-03-14 |
Imperas provides an instruction-accurate simulator and extension libraries that let teams add RISC‑V custom opcodes, profile C code, then recompile and… | ||
| Customizing RISC-V Cores to Accelerate Neural Networks | embedded world 2022 | 2022-06-21 |
Demonstration shows the Codasip L31 core extended with a small AI accelerator and custom instructions (notably a pushconf instruction plus a FIFO register… | ||
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