Rust Atomics in the Wild: Memory Ordering Design Patterns [...]
Talkat RustConf 2026 · on Thursday, 2026-09-10· at 11:50· Room 511 | Palais des Congrès de Montréal, Palais des Congrès de Montréal·
summary
Covers concrete Rust patterns and failures: a futex implemented with an AtomicU32 uses acquire-release for lock/unlock and release+fence to guarantee safe drop; Arc clone/drop uses fetch_add/fetch_sub with relaxed for increments and a fence to synchronize destruction; bounded MPMC channel packs head/tail into one atomic and uses probe-validate-execute (relaxed probe, acquire validate, RMW reserve) with seq‑cons fences in Rayon to prove the “producer misses sleeper” outcome is impossible. Tests must target x86 and ARM due to differing hardware orderings.
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chapters (8)
- 0:00Introduction and background
- 1:53Rust atomics basics
- 6:07Happens-before relationships
- 8:53Acquire and release patterns
- 10:28Real-world examples
- 16:04Probe validate execute
- 19:06Sequential consistency
- 29:15Q&A on memory ordering
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