R-Visor: An Extensible Dynamic Binary Instrumentation and Analysis Framework for Open(…)
summary
R-Visor is a JIT cache-based dynamic binary instrumentation engine plus an ArchVisor DSL for adding ISA extensions; implemented in ~8,000 lines of C for the RV64GC2 RISC‑V toolchain and evaluated on a tri 5 processor hosted on an FPGA using the EMBench suite (23 binaries). Compared to DynamoRIO, R-Visor reports 1.81× lower runtime overhead and 2.64× lower memory use, needs 9.30× less code to support F and C extensions, uses trace linking and delivers ~16.94% average code-size reduction for compressed-instruction emulation.
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chapters (16)
- 0:00R-Visor introduction
- 1:25Dynamic binary instrumentation fundamentals
- 3:07Open ISA challenges
- 4:34R-Visor extensible design
- 5:37R-Visor architecture
- 7:02Low overhead optimizations
- 8:05ArchVisor DSL extensibility
- 9:52ArchVisor grammar design
- 11:15Implementation details
- 11:36Experimental setup
- 12:23Performance vs DynamoRIO
- 13:26Code overhead reduction
- 13:49Instruction emulation use case
- 15:14Future work
- 16:19Conclusion and availability
- 17:03Q&A
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