LCTES 2025
as the organisers put it
LCTES 2025 Welcome to the 26th ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES 2025)! LCTES provides a link between the programming languages and embedded systems engineering communities. Researchers and developers in these areas are addressing many similar problems but with different backgrounds and approaches. LCTES is intended to expose researchers and developers from either area to relevant work and interesting problems in the other area and provide a forum where they can interact. LCTES 2025 is co-located with and shares the v ...
| title | author | length |
|---|---|---|
| Kubism: Disassembling and Reassembling K-Means Clustering for Mobile Heterogeneous(…) | Seondeok Kim, Sangun Choi, Jaebeom Jeon, Junsu Kim, Minseong Gil, Jaehyeok Ryu, Yunho Oh | 17m |
Kubism disassembles K‑means by first scanning which point–centroid distances are skippable, building a bitmap metadata to reorder work so threads only fetch… | ||
| SetMP: Set Associative Mapping Management for Multi-plane Optimization in SSDs | Aobo Yang, Huanhuan Tian, Yuyang He, Jiaojiao Wu, Jiaxu Wu, Zhibing Sha, Zhigang Cai, Jianwei Liao | 19m |
SetMP: Set Associative Mapping Management for Multi-plane Optimization in SSDs (Video, LCTES 2025)
Aobo Yang, Huanhuan Tian, Yuyang He, Jiaojiao Wu, Jiaxu Wu… | ||
| R-Visor: An Extensible Dynamic Binary Instrumentation and Analysis Framework for Open(…) | Edwin Kayang, Mishel Jyothis Paul, Eric Jahns, Muslum Ozgur Ozmen, Milan Stojkov, Kevin Rudd, Michel A. Kinsy | 18m |
R-Visor is a JIT cache-based dynamic binary instrumentation engine plus an ArchVisor DSL for adding ISA extensions; implemented in ~8,000 lines of C for the… | ||
| Multi-level Machine Learning-Guided Autotuning for Efficient Code Generation on a Deep(…) | JooHyoung Cha, Munyoung Lee, Jinse Kwon, Jemin Lee, Yongin Kwon | 22m |
ML2Tuner implements a validity-prediction model to skip configurations that would crash and a second performance model that uses hidden compiler features… | ||
| Grouptuner: Efficient Group-Aware Compiler Auto-tuning | Bingyu Gao, Mengyu Yao, Ziming Wang, Dong Liu, Ding Li, Xiangqun Chen, Yao Guo | 20m |
Grouptuner is a group-aware compiler auto-tuner that groups 200 GCC options into 15 functionally related groups and performs localized group-level mutations… | ||
| JetCert: A Self-Adaptive Compilation Framework for Fast and Safe Code Execution | Arman Cham Heidari, Mehran Alidoost Nia | 15m |
JetCert is a framework that switches between formally certified compilation (Concert) and a JIT-style compiler (Namba) at runtime using a MAPE-K control loop… | ||
| vNV-Heap: An Ownership-Based Virtually Non-volatile Heap for Embedded Systems | Markus Elias Gerber, Luis Gerhorst, Ishwar Mudraje, Kai Vogelgesang, Thorsten Herfet, Peter Wägemann | 22m |
vNV-Heap implements an ownership-based virtually non-volatile heap that uses ownership and borrowing (Rust-style) to track object modifications at compile… | ||
| SSFFT: Energy-Efficient Selective Scaling for Fast Fourier Transform in Embedded GPUs | Dongwon Yang, Jaebeom Jeon, Minseong Gil, Junsu Kim, Seondeok Kim, Gunjae Koo, Myung Kuk Yoon, Yunho Oh | 19m |
Proposes SSFFT, a software method that uses a theoretical model to statically pick thread-block and thread counts per FFT and to choose between a regular… | ||
| ASC-Hook: Efficient System Call Interception for ARM | Yang Shen, Min Xie, Tao Wu, Wenzhe Zhang, Ruibo Wang, Gen Zhang | 21m |
Binary-rewriting framework that intercepts ARM SVCs by replacing the SVC plus its preceding MOV/ADRP and redirecting to a per-SVC trampoline; uses a hybrid… | ||
| rtesbench: A Multi-core Benchmark Framework for Real-Time Embedded Systems | Yixiao Xing, Yixiao Li, Hiroaki Takada | 19m |
rtesbench is a Python-driven framework that generates C workloads, runs them via platform scripts, captures serial output and plots histograms to measure… | ||
| SCCharts Twelve Years Later: A Reflection on Sequential Constructiveness and(…) | Reinhard von Hanxleden | 01h 09m |
Claims that sequential constructiveness lets the compiler infer safe in-tick scheduling (allowing if(!x) x:=true) and that text-first modeling with KIELER +… | ||
| Towards Macro-Aware C-to-Rust Transpilation (WIP) | Robbe De Greef, Attilio Discepoli, Esteban Aguililla Klein, Théo Engels, Ken Hasselmann, Antonio Paolillo | 13m |
Claims a macro-aware C-to-Rust transpiler called Oxidize that preserves macro abstractions instead of expanding everything, built from scratch and using a… | ||
| Modeling and Verification of Sigma Delta Neural Networks using Satisfiability Modulo(…) | Sirshendu Das, Ansuman Banerjee, Swarup Kumar Mohalik | 21m |
Presents an SMT encoding of SDNNs that models rounding, delta and sigma operations, derives per-neuron interval bounds to prune the search, and encodes an… | ||
| Graphitron: A Domain Specific Language for FPGA-Based Graph Processing Accelerator(…) | Xinmiao Zhang, Zheng Feng, Shengwen Liang, Xinyu Chen, Lei Zhang, Cheng Liu | 21m |
Graphitron is a DSL that compiles graph code to HLS-based FPGA kernels (evaluated on a Xilinx U280), auto-infers processing paradigm and applies burst… | ||
| ADaPS: Adaptive Data Partitioning to Parallelize CNN Inference on Resource-Constrained(…) | Jaume Mateu Cuadrat, Bernhard Egger | 15m |
ADaPS is a framework that partitions CNN height/width on heterogeneous embedded devices with an analytical model that accounts for compute, memory and comms… | ||
| SPARQ: An Accelerator Architecture for Large Language Models with Joint Sparsity and(…) | Seonggyu Choi, Hyungmin Cho | 25m |
SPARQ is an ASIC-style accelerator that runs large LLM inference natively on floating-point inputs with 4-bit weights and exploits 2:4 semi-structured sparsity… | ||
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