The Continued Evolution of High Frequency Trading Systems
summary
Systems ingest bursts above five million messages per second, use kdb or Cassandra for tick stores, and rely on RDMA achieving 6 GB/s and 2 µs server‑to‑server transfers and FPGAs returning sub‑microsecond packet processing for edge advantages. Expect extreme C++ (~70%) and Java (~25%) tuning, kernel bypass/verbs, nanosecond timestamps, pinned memory and cache‑line alignment, smart order routers, VWAP/time‑weighted metrics, dark‑pool access (lx), and hard lessons like the 500M loss from runaway algos — durability via network replication and aggressive GC/jitter control.
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chapters (31)
- 0:00Intro
- 1:01Background and Biases
- 3:50Legal stuff
- 5:16Investment Banking
- 6:11It's all buying and selling
- 6:50Trading book
- 10:26Factors impacting liquidy
- 10:49Trade Flow
- 12:07Algorithmic Trading Strategies
- 14:36Buying strategies
- 16:49Average Prices
- 18:15Risk Analysis
- 19:26Compliance and Regulations
- 20:43Trading Protocols
- 23:01Sell Side System - Venue
- 24:40Buy Side System
- 27:45Time Series - Tick databases
- 28:47QUANT programming
- 30:20Programming languages and styles
- 32:37Intelligent Trading Architecture example
- 34:00Low latency-programming skills
- 36:46Low latency network programming
- 37:51Java expertise area
- 38:17C++ expertise area's
- 38:36Remote Direct Memory Access (ROMA)
- 39:39Programming with ROMA VERBS
- 41:47GPU memory
- 42:15GPU flow
- 43:01Xcelent Code example
- 44:33FPGA Programming
- 46:05FPGA - programming tools
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