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System Level Design: Interconnect and 3D Stacking

Talkat CASES 2022 · 2022-10-07..10-14
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name:Kaoyi Sun
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name:Rui Mao
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name:Yi Wang
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name:Yuzhe Hua
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name:Xuan Gao
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GCIM moves GCN aggregation into the logic die of a 3D‑stacked memory, adds lightweight bank‑level compute and a community‑aware partitioner, and reports about 20% latency reduction and a 27% increase in bank‑group hit rate. DirectGNN pairs structural pruning with crossbar‑aware mapping to cut peripheral crossbar count by >90%, reduce communication latency ~41%, and claim up to 2.7× runtime speedup. ML‑guided inlining (MLGoPerf) retargets rewards to performance and shows a 1.8% SPEC geometric mean speedup over -O3 (code size +17%).

AI-written summary · about

  1. 0:00Start
  2. 17:10Background and Motivation
  3. 18:423d Stack Memory
  4. 21:36Hardware Architecture
  5. 25:20Experimental Evaluations
  6. 31:45Introduction
  7. 34:43Processing Memory
  8. 36:243d Print Architecture
  9. 40:27Results
  10. 41:56Conclusion
  11. 50:15Performance Overhead
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