~/talks

Mark Silberstein

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titleconferencedate
In Link We Trust: BFT at the Speed of CFT using SwitchesNSDI '262026-05-04
SwitchBFT implements a BFT consensus sequencer on P4 programmable switches, claiming BFT latency and throughput equal to CFT NOPaxos by using packet source…
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Accelerating Nested Virtualization with HyperTurtleUSENIX ATC '252025-07-07
HyperTurtle reduces nested-VM world switches by offloading L1 code as eBPF running in L0, keeping L1 control while making only a few hundred non-intrusive…
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Multitenant In-Network Acceleration with SwitchVM21st USENIX Symposium on Networked Systems Design and Implementation (NSDI '24)2024-04-16
Proposes SwitchVM: a sandboxed VM that runs tenant Turing-complete DPFs on programmable switches, implemented as an interpreter built in P4 on Intel Tofino…
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Translation Pass-Through for Near-Native Paging Performance in VMsUSENIX ATC '232023-07-10
Proposes Translation Pass-Through (TPT): guests build one-dimensional guest-virtual→host-physical page tables while the host enforces isolation via a per-VM…
Talk
ZNSwap: un-Block your SwapUSENIX ATC '222022-07-11
ZNSwap is a swap subsystem for Zoned Namespace SSDs that implements a space-efficient host-side GC and OS–device co‑ordination to avoid unnecessary internal…
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Reconsidering OS Memory Optimizations in the Presence of Disaggregated MemoryISMM 20222022-06-14
Claim: disaggregated memory with 750 ns–1.5 µs remote latency flips usual OS choices, so the authors build HotBox, a base-page-only memory manager that uses a…
Talk
SwiSh: Distributed Shared State Abstractions for Programmable Switches19th USENIX Symposium on Networked Systems Design and Implementation (NSDI '22)2022-04-04
SwiSh provides a data‑plane shared‑state layer that runs on P4/Tofino switches and implements three replication protocols (strong, eventual, and Strong…
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An edge-queued datagram service for all datacenter traffic19th USENIX Symposium on Networked Systems Design and Implementation (NSDI '22)2022-04-04
EQDS claims to move queuing to senders and enforce delivery via receiver-driven grants, implemented with either a packet trimming backend (Intel Tofino…
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Scaling Open vSwitch with a Computational Cache19th USENIX Symposium on Networked Systems Design and Implementation (NSDI '22)2022-04-04
Open vSwitch packet classification uses neural inference via NuevoMatch-APP, a reworked NuevoMatch that speeds training by ~1,000× through bucketizing ranges…
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Fine-tuning giant neural networks on commodity hardware with automatic pipeline...USENIX ATC '212021-07-14
FTPipe presents a practical pipeline model‑parallel system that fine‑tunes giant transformers (BERT‑340M, GPT2‑1.5B, T5‑3B) on commodity PCIe GPUs by…
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NICA: An Infrastructure for Inline Acceleration of Network ApplicationsUSENIX ATC '192019-07-10
NICA builds an ikernel abstraction and runtime that runs AFUs on a Mellanox FPGA+ASIC board, prototypes on Mellanox Anova Flex, and integrates with VMA and…
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CoSMIX: A Compiler-based System for Secure Memory Instrumentation and Execution in EnclavesUSENIX ATC '192019-07-10
A compiler instruments memory accesses to route regions to pluggable memory stores and a lightweight enclave runtime handles faults without costly enclave…
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GAIA: An OS Page Cache for Heterogeneous SystemsUSENIX ATC '192019-07-10
GAIA integrates GPU memory into the OS page cache by implementing a weakly-consistent page cache and a lazy release consistency protocol inside Linux…
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