RISC-V 101 2023
2023-11-06
Santa Clara, United States
as the organisers put it
In-person Event - This is your introduction to the open standard RISC-V Instruction Set Architecture (ISA), rapidly being adopted around the world, accelerating innovation and enabling unprecedented design freedom. Discover our diverse ecosystem, developing technologies that are powering a wide range of markets. Breakouts explore commercial solutions, software development, careers and joining technical committee
| title | author | length |
|---|---|---|
| RISC-V 101: Welcome Remarks and Introductions | Calista Redmond | 06m |
Overview of the agenda and concrete next steps: RISC-V community frames open collaboration as needing commercialization or it stays a hobby, highlights a… | ||
| What is RISC-V? | John Ronco | 31m |
RISC-V is an open, royalty-free ISA positioned as an alternative to proprietary ISAs with SiFive commercial cores, a neutral RISC-V International governance… | ||
| Why RISC-V? | Keith Graham | 19m |
RISC-V enables incremental on-chip customization so a small core gains domain-specific resources without breaking base software compatibility, reducing area… | ||
| The RISC-V Ecosystem | Ted Speers | 27m |
RISC-V now has multiple commercial and open implementations, working toolchains and boards: PolarFire SoC with four application cores plus a… | ||
| Make vs. Buy on RISC-V | Larry Lapides | 23m |
Decision checklist for RISC‑V cores: choose among ~3 dozen commercial IP vendors (SiFive claims ~350 design wins), serious open‑source projects (lowRISC… | ||
| Software | Jefro Osier-Mixon | 11m |
Overview of where RISC-V software actually lives and who pays for it: the ecosystem documents and tracks work on the RISC-V wiki and GitHub with ports for… | ||
| Getting Involved in RISC-V Technical Committees | Martin Maas | 19m |
RISC-V technical work runs through horizontal committees, ISA committees, and short-lived task groups that produce a spec, proof-of-concept, a formal model in… | ||
| Wrap Up and Call to Action | Calista Redmond | 03m |
Attendees hear a concrete offer: free membership signup via the online process, plus access to a limited Keynotes and Expo pass for RISC-V 101 registrants (not… | ||
| RISC-V 101 | kalista Redmond | 02h 18m |
Presentation asserts tens of billions shipped of RISC-V cores and reports 350+ design wins for SiFive, with Android moving to first‑class RISC‑V support… | ||
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